The Construction of Large Scale Reconfigurable Parallel Computing Systems (The Architecture of the SC320)

Reconngurable communication networks for massively parallel multiprocessor systems ooer the possibility to realize a number of application demands like special communication patterns or real-time requirements. This paper presents the design principle of a reconngurable network which is able to realize any graph of maximal degree four. The architecture is based on a special multistage Clos network, constructed out of a number of static routing switches of equal size. Upper bounds on the cut size of 4-regular graphs, if split into a number of clusters, allow minimizing the number of switches and connections while still ooering the desired reconnguration capabilities as well as large scalability and exible multiuser access. EEcient algorithms connguring the architecture are based on an old result by Petersen 27 about the decomposition of regular graphs. The concept presented here is the basis for the Parsytec SC series of reconngurable MPP-systems. The currently largest realization with 320 processors is presented in greater detail.